Precision timing and time synchronization on FPGA
We build hardware timestamping and clock synchronization accurate to nanoseconds, for systems where time is part of the data.
The problem
Capture, trading, fronthaul and broadcast all depend on knowing exactly when something happened, across many boxes. Software timestamps drift by microseconds. The answer is timestamping at the wire and disciplining every clock to a common reference.
What we build
- IEEE 1588 PTP hardware clocks and timestamping
- Clock recovery and disciplining
- Time distribution across boards
- Timestamp-accurate capture paths
- Timing measurement and validation
Markets
- Telecom fronthaul
- Finance
- Broadcast (ST 2110)
- Test & measurement
Frequently asked questions
Which timing standards do you support?
IEEE 1588 PTP and its telecom (ITU-T) and broadcast (SMPTE ST 2059) profiles.
Why timestamp in hardware?
Software timestamps vary by microseconds with load. Hardware stamps at the wire are fixed and measurable.
Can you synchronize multiple boards?
Yes, by distributing time from a common reference and measuring the residual error.
Related
Discuss your project
Share the target, interfaces, and timeline. We’ll tell you what we’d take on first.